Test Control Software TCS

The Tester Control Software (TCS) provides a complete, flexible and easy-to-use set of graphical user interfaces (GUIs) for test program creation, edit, and debug, as well as windows for test program control, data collection and retrieval. Each window is self-contained and independently controls a different aspect of the test system.
 

Graphical Sequence Editor

The Graphical Sequence Editor (GSE) is a best-in-class tool for writing pattern sequences. Pattern development that used to take days or weeks can now be completed in a matter of minutes or hours. There is no longer any need to learn a primitive pattern programming language to create complex pattern sequences. EPM Test has included a full, rich pattern programming language helper.

Users can customize the GSE interface to various device architectures and can create a pattern sequence definition in the GSE window using various point-and-click tools to insert, cut, paste and manipulate chip inputs, cycle-by-cycle, until the test pattern sequence has been fully defined. The GSE graphical interface provides easy access to a complete selection of pattern sequence constructs such as:

• Three levels of loops

• Flexible address and data calculations

• Menus to apply micro code options

• Embedded references to other GSE diagrams,
  Vector Lists and Pattern Sequences.

The GSE utility understands the concepts behind block programming of various FLASH memories and can also handle the scan testing of block-structured NAND FLASH devices where BAD BLOCKS are defined.

All GSE features are aimed at simplifying the task of creating the test pattern sequences for your application. As changes are made to the visual display of the GSE diagram, the system automatically and instantaneously creates the corresponding tester microcode.

Bitmap Capture Viewer

One of the most powerful tools for analyzing memories is the bitmap. The EPM Test real-time bitmap subsystem sets new standards in high-speed bitmap capture, storage, retrieval, manipulation, and display. Bit-maps are captured at full tester speed for up to 72 data I/O. Both single-plane and dual-plane multi-color captures are available.

The Bitmap Capture Viewer (BCV) provides up to three views of the bitmap data: a navigation view and two additional views that operate independently or as a linked pair. The system collects bitmaps per chip, per test, and per analysis step.

The Bitmap Capture Viewer automatically links to the optional Wafer Viewer Tool.

The BCV supports several mappings of the data including topological and electrical layouts. The origin and current cursor position are displayed in the information window in topological and electrical formats. Event counts are available for the full bitmap, by captured plane, by DQ, and by selected row or column. The user can select to display failed bits corresponding to only specific tests, allowing test coverage analysis.

EPM Test has included many features in the BCV to enhance engineering productivity. Both bitmap panning and zooming are available, as well as rotate and mirror functions to make the viewed rows and columns match your device orientation. The software also supports a cross-hair cursor coupled with a coordinate address display. There are several mouse and keyboard operations that support cursor motion including: jog to next location, move to next X or Y event, and snap to first X or Y event.

Parametric Test Unit per Data Pin

The MS5205 Test System has several hardware-assisted features targeted at specific device types. One such feature for testing FLASH memories is the Parametric Test Unit (PTU) on each data I/O pin. Each PTU can force and sense voltage or current. is that the sense values can be compared and sent to the bitmap system. This is particularly useful for measuring per cell current or voltage threshold distributions.
 

V_HH per Address, Clock and Logic Pin

The hardware provides a third voltage level (0 <= V_HH <= 8V) on all address, clock and logic control pins. The system also supports independently programmed levels and timing on all address and clock pins. This function is used to access special test modes within the devices to be tested, particularly Flash memories.
 

Sybase® Relational Database System

The Tester Control Software (TCS) employs an ANSI standard SQL interface and ODBC compliant container technology to insert, extract and validate test program and test result data in the RDMS.

TCS eliminates tedious text and command-driven environments by providing a completely interactive and easy-to-use graphical user interface for system control, program development, test debug, result gathering and archival. Sophisticated software allows you to focus on the device being tested -not the test system. Using simple and intuitive windows operations, users can:

• construct and refine test programs,

• execute tests, define bin trees,

• analyze data,

• perform "what-If" experiments,

• capture bitmaps, and

• run SHMOO plots.

Test results can be stored in the Result Database in a variety of forms including data and error logs, bin-sort summaries, multi-dimensional (1, 2, and 3) plots, individual or family of curves, and many forms of bitmaps. The software can store and retrieve test result data using such markers as current shift, site, tester type, tester, operator, and DUT card identifiers.

'C'-Language Functions

The Test System software offers a feature-rich test language and complete development environment when your test process needs a capability not available in the standard Tester Control Software (TCS) repertoire. At any step within the test process, the user can intercept and augment or replace the specific TCS testing process with their own function. EPM Test provides a full set of interactive and pre-packaged utilities for compiling, linking and debugging user functions. Tools within TCS allow the association of each function with a specific stage or step in the execution of a test program, an individual test or at steps within each test.

The environment's best feature is the programmer's ability to use as much or as little of the GUI as necessary to tailor the application for the target user. Programmers can also use the GUI in a similar manner to control and parameterize user functions for development of custom user patterns and vector lists.
 

Remote Test Head (RTH)

The test head contains all the pin electronics for 36 Address/Clock pins, 18 or 36 Data I/O pins and 32 Logic Control pins. The pin electronics include a Parametric Test Unit (link to feature) per Data pin and programmable V_HH per Address and Logic Control pin. The remote test head accommodates packaged devices and interfaces easily to package handlers, wafer probe stations, Field Ion-Beam, and E-Beam diagnostic systems using an optional Test Head Positioner.